MITSUBISHI ELECTRICMITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.T 2003 ECHNICALRAININGProjection TelevisionTechnical Training &Troubleshooting Man
45 Format Memory Card ReaderDigital music and photography can now be enjoyedin the home theater environment thanks to thememory card reader featured i
5CompatibilityUsers having difficulties with the memory card readershould be aware of the following requirements:For JPEG Pictures up to 128mb:1. Stil
6MonitorLink™MonitorLink is a new digital interface introduced inMitsubishi's 2003-2004 model line, including theV23 chassis.MonitorLink provides
7Used with its optional copy protection scheme, DVImakes it possible to view full resolution signals with-out exposing the signal to copyright infring
8Display Data Channel (DDC)The VESA standard Display Data Channel, shownin Figure 10, is part of the DVI specification. It isan I2C bus used for data
9High-bandwidth Digital Content Protection(HDCP)HDCP is a system designed to protect the outputs ofa DVI device from being copied. The protection can
10PIN SIGNAL PIN SIGNAL1 TMDS Data 2- 16 Hot Plug Detect2 TMDS Data 2+ 17 TMDS Data 0-3 TMDS 2&4 Shield 18 TMDS Data 0+4 TMDS Data 4- (NA) 19 TMDS
11Figure 13: V23 Chassis DVI Input Block Diagram
12Chassis Option Menu Adjustment Mode Convergence Mode OSD PositionVZ5/VZ6/V151-3-7-0 2-3-5-7 2-3-5-9 <6><5><4> Adjust ModeVZ7/VZ8/V
1-1Chapter 1Disassembly and ServiceFigure 1-1: Lightbox Removal - 48” ModelsWith 11 different models, mechanical features anddisassembly procedures v
1-2The lightbox removal procedure for 48” V23 mod-els is shown in Figure 1-1.1. Remove the Back Board by removing 7screws (a), 2 screws (b) and 8 scre
1-3Figure 1-2: Main Chassis RemovalFigure 1-3: DM ReplacementStep 1 Step 2 Step 3TOP VIEWREAR VIEW TOP VIEW
1-4Figure 1-4: PCB LocationsFigure 1-5: Main Component Locations
1-5PCB & Major Component LocationsPCB and major component locations are shown inFigures 1-4 and 1-5. The major circuit functionsperformed on each
1-6 V23+++ Composite Cabinet BackThe WS-55813 and WS-65813 feature a unique cabi-net similar to last year’s WS-65712. It has a com-posite cabinet bac
2-1Chapter 2Alignment ProceduresWith the exception of the Service Menu access codes,the general alignment procedures for the V23 chas-sis remains the
2-2AudioEdit SetupClock Setting Manual Volume 30%ReviewTime 12:00 AM Bass 50%Antenna A(v) EnabledDay Monday Treble 50%Antenna B(v) EnabledBalance 50%I
2-3Circuit Adjustment ModeMost of the adjustments can only be performed us-ing the remote hand unit. See Figure 2-2. Many ofthe adjustments must be
2-4Selection of adjustment Functions andAdjustment ItemsTo select an adjustment item in the circuitadjustment mode, first select the adjustmentfunctio
2-5Convergence Adjustment ModeThe Convergence mode is used to perform raster ge-ometry correction and convergence adjustments.These adjustments must b
T 2003 ECHNICALRAININGV23 ChassisProjection TelevisionTechnical Training &Troubleshooting ManualCopyright © 2003, Mitsubishi Digital Electronics
2-61) Use AUDIO button to select a SubFunction2) Use the VIDEO button to select anAdjustment Item.3) Use the ADJUST buttons to changedata.FINE CONV (P
3-1Chapter 3Power SupplyFrom the above diagram, it is apparent that the V23Chassis has four Power Supply Operational Modes.1) Low Energy Mode2) Standa
3-2A 132 kHz internal Oscillator drives an internal OutputFET. The signal from the FET at pin 5 of IC9A10,drives transformer T9A10. Signal from pin
3-3Low Energy Power DistributionFigure 3-4 shows the Low Energy Mode Power Dis-tribution. As stated earlier, the Low Energy 9VS is thesource for the
3-4Standard Standby SupplyThe Standard Standby Regulator circuit is shown in Fig-ure 3-5.Start-upThe Start-up Voltage Supply is from R9A18 in the LowE
3-5Standard Standby SuppliesTwo Standby supplies are generated directly fromT9A20, 12VS and 6VS. Both of these supplies aredirected to the DM module,
3-6When PON-1 goes High, Q9A21 turns Off, allowingQ9A20 to turn On. With Q9A20 conducting, the 12Vsupply is generated from the 12VS supply. The 12Vs
3-7gence Generator, 3DYC and Signal Select circuitry, andto IC2E65. IC2E65 generates 2.5 Volts for 3DYC.The 12V supply provides power for Tuners and
3-8the oscillator drive to the FET. The PWM is automati-cally changed to maintain a constant 110V source.Five supplies are directly generated by sign
3-9If the LED does not flash:• Check that the DM board is seated properly.• Check that there is Standby 9VS (Fig. 3-2).• Check that the SUB-POWER comm
3-10
4-1Chapter 4Control CircuitryAs in the two earlier integrated HDTV chassis, V19and V21, the V23 uses two Microprocessors in theControl circuitry.1) TV
4-2we are not showing the details of the DM circuitry. Fig-ure 4-1 shows only the DC supplies and Reset signalgoing to the DM module.Reset CircuitryF
4-3Both the µPCs have the ability to reset each other ifcommunication is lost. IC7C30 serves as a Reset inter-face between the two µPCs and the front
4-4IR signals from a Mitsubishi Remote are directed to theRMC input of IC7A00. The signals are filtered, pro-cessed and directed over the IR-IN-BUSY
4-5Note that the output of the Wide Band Preamp (IR-IN)is also directed to the SYS-5 µPC. This connectionwas not used in the V19 and V21. It enables
4-6SHORT DetectThe short Detect circuitry is shown in Figure 4-6 and isthe same as in the V19 and V21 chassis. If a shortoccurs in the + or – 24V sup
4-7Parallel OutputsMost of the parallel outputs are listed in Table 4-2. Mostof them have been used before and need no explana-tion. However, the fu
4-8The PerfectColor feature is performed in the Doublercircuit, therefore all signal sources must pass throughthe Doubler. With DM signal sources, an
5-1Chapter 5Video/Color CircuitryThe above block diagram illustrates the Video/Colorcircuitry in the V23 chassis. Although initially it looksthe same
IIntroduction ... New TechnologiesModels ...
5-2PCB-TERMINAL Video PathFigure 5-1 illustrates the Video Signal Path on the PCB-TERMINAL. The AV-Switch circuitry has not changed,IC2L00 and IC2K00
5-3The Sub picture signals from IC2B00 are directed toIC2G00, the Sub Decoder. Switch circuitry in IC2G00selects Sub picture signals from IC2B00 or t
5-4The outputs of the Doubler circuit, ASIC-Y, ASIC-Pband ASIC-Pr are directed to the VCJ. The signals areprocessed in the VCJ and CRT RGB drive sign
5-5Digital Signal PathThe basic Digital Signal path was shown in Figure 5-2.Figure 5-4 shows the Digital Path in more detail. Digi-tal signal sources
5-6Monitor Out CircuitFigure 5-5 shows that the Monitor Output signal sourceis limited to an NTSC source, or the DM Module. TheNTSC Y and C signals f
6-1Chapter 6Sync, Deflection & High VoltageThe Overall Sync, Deflection and Hign Voltage cir-cuitry in the V23 is shown in the Block Diagram atthe
6-2Sync Signal PathFigure 6-1 illustrates the Sync Signal Path for theMain Picture signals on the PCB-Terminal. IC2K00,IC2A00, IC2B00 and IC2A95 comp
6-3Figure 6-2 illustrates the Sub Sync Signal Path forthe Sub-Picture signals on the PCB-Terminal. Itfunctions the same as the Main Sync Signal Pathu
6-4From the flip-flops, sync pulses are directed to theVCJ, IC2V01. Both Horizontal and Vertical DriveGenerators are in the VCJ. Horizontal drive is
6-5Vertical DeflectionFigure 6-4 shows the Vertical Deflection circuitry.The Vertical Deflection Generator in the VCJ out-puts push-pull type of verti
IIChapter 5 ... Video/Color CircuitryOverall Block Diagram ... 5-1
6-6Horizontal Deflection DC Supply CircuitryThe DC supplies for Q5A32 and Q5A31 are derivedfrom Horizontal Deflection DC Supply circuitry. The31K lin
6-7The DEFL-MUTE line from the µPC and Q5A08reduce the DC supply during scan frequency changeby the same method.The DC supply for the Horizontal Drive
6-8HV & HV RegulationFigure 6-8 illustrates the HV and HV Regulation cir-cuitry. Drive from the Horizontal Deflection Out-put circuitry is applie
6-9DO NOT measure the HV-DC-FB voltage at pin 13of the T5A51. The meter may load down the inter-nal resistive divider, resulting in excessive HV.X-Ra
6-10Q5A20 and its associated circuitry comprise an ArcProtect circuit. If a CRT Arcs this circuitry immedi-ately removes HV Drive.If X-Ray Protect sh
7-1Chapter 7Convergence CircuitryThe Overall Block Diagram in Figure 7-1 shows thethe V23 Convergence Circuitry.. A Waveform Gen-erator generates the
7-2Waveform Generator & D/AConverterFigure 7-2 illustrates the Convergence WaveformGenerator and Digital/Analog Converter circuitry.Horizontal Syn
7-3LPF & Summing AmpsFigure 7-3 illustrates the LPF and Summing Ampli-fiers. The circuitry consists of three ICs, IC8E00,IC8E01 and IC8E02. Each
7-4Convergence Output CircuitryFigure 7-4 shows the Convergence Output circuitrylocated on the PCB-Power. The correction signalsFigure 7-4: Converge
8-1Chapter 8Sound CircuitryThe V23 Sound Circuitry is shown above in the Over-all Block Diagram, Figure 8-1.The Sound Source Select circuitry selects
1IntroductionThe V23 Chassis is carried in the Gold, Gold Plus,Platinum and Diamond series models for 2003 and2004. This full featured, integrated HD
8-2Figure 8-2: Overall Sound Circuitry Block Diagram
8-3Overall Sound Signal PathFigure 8-2 illustrates the Overall Sound CircuitryBlock Diagram. The AV/SW ICs, IC2L00 andIC2K00, used to select Main and
8-4
9-1Chapter 9Troubleshooting TipsUse the following tips when troubleshooting the sourceof a problem in the V23 chassis.Using The Front Panel LEDThe Fro
9-2DM Module CheckWhen the TV turns On, but a problem exists that maybe caused by the DM Module, perform the followingtwo checks:1) Select the DTV Ant
Copyright © 2003 Mitsubishi Digital Electronics America, Inc.9351 Jeronimo Road • Irvine, CA 92618-1904T/M V23
2Feature ExplainationATSC and Unscrambled QAM Reception Greater SensitivityNetCommand™ 3.0 Home Theater Control by Firewire or IRFive-Format Memory Ca
3NetCommand 3.0NetCommand allows most commonhome theater products to be connectedand controlled by way of the TV's re-mote control by simply sele
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